IDT multimedia interconnect 6x faster and 90% less battery drain

This industry-first synchronous multimedia interconnect chip works with application and baseband processors that use an address-data mux (ADM) interface. M2I uses 50% fewer processor I/) pins, leaving them free for increased functionality.

According to Michael Olsen at IDT's Flow Control Management Division, "This chip will allow wireless handset designers to dramatically improve performance within the handset, while at the same time, reducing overall energy consumption by approximately 90%."

The architecture uses a synchronous clocking scheme that enables the use of an internal counter, eliminating the necessity for multiple addressing. As a result, 64 Kbits of data is processed in only 4,001 cycles compared with the 8,000 cycle necessary with earlier generations. The cycle also runs 3x faster--providing an overall 6x improvement.

The device is currently sampling and is priced at $3.00 in 10,000 unit quantities.